Alif Semiconductor /AE512F80F5582LS_CM55_HE_View /CSI /CSI_INT_ST_PHY

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Interpret as CSI_INT_ST_PHY

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PHY_ERRSOTHS_0)PHY_ERRSOTHS_0 0 (PHY_ERRSOTHS_1)PHY_ERRSOTHS_1 0 (PHY_ERRESC_0)PHY_ERRESC_0 0 (PHY_ERRESC_1)PHY_ERRESC_1

Description

PHY Interrupt Status Register

Fields

PHY_ERRSOTHS_0

Start of transmission error on data lane 0 (synchronization can still be achieved).

PHY_ERRSOTHS_1

Start of transmission error on data lane 1 (synchronization can still be achieved).

PHY_ERRESC_0

Start of Transmission Error on data lane 0 (no synchronization achieved).

PHY_ERRESC_1

Start of Transmission Error on data lane 1 (no synchronization achieved).

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